A CASE FOR 16-BIT FLOATING POINT NUMBERS: graphics and media applications

Daniel Etiemble, Lionel Lacassagne

Introduction

A 16-bit floating point has been introduced in the OpenEXP format and Cg language.

In graphics and media applications, it can provide a significant speed-up versus scalar integer format for all applications for which the dynamic range exceeds the 16-bit integer (short) or 32-bit integer (int) formats without needing the precision and dynamic range of the 32-bit FP format.

The speed-up comes from

• More operations per instruction when using 16-bit FP SIMD instructions compared to 32-bit integer SIMD or 32-bit FP computation
• Easy manual or compiler FP SIMDization compared to the drawbacks of integer SIMD instructions for which input and output ranges are different for addition and multiplication

The 16-bit FP SIMD instructions have been evaluated on Pentium 4 microprocessors with SSE2 SIMD instructions and Power PC G4 and G5 with Altivec SIMD instructions [1,2]. They have been implemented as customized NIOS II instructions in Altera FPGAs [3]. They have been used for teaching purposes [4].

They are currently evaluated with the Xtensa processor (Tensilica).

Benchmarks

Currently used benchmarks

• Grayscale: it is our own version of the EEMBC Grayscale benchmark.
• Deriche benchmarks: gradient and Horizontal-Vertical version of the Deriche filter
• Achard and Harris algorithms to detect points of interest (POI)
• FDCT of JPEG-6a in Mediabench suite.
• ...

Harris and Achard algorithms for detecting points of interest (POI)

C scalar versions of the different benchmarks are available.

Call for benchmarks

If you have benchmarks that would be interesting to test, please contact us or send us your benchmarks.

Publications

1. D. Etiemble and L. Lacassagne, “16-bit FP sub-word parallelism to facilitate compiler vectorization and improve performance of image and media processing », Proc. ICPP-2004, Montreal, Canada, August 2004.

2. L. Lacassagne, D. Etiemble and S.A. Ould Kablia, “16-bit floating point instructions for embedded multimedia applications". Proc. IEEE CAMP05 (International Workshop on Computer Architecture for Machine Perception), Palermo, July 2005

3. D. Etiemble, S. Bouaziz and D. Etiemble, "Customizing 16-bit floating point instructions on a NIOS II processor for FPGA image and media processing", in IEEE Workshop on Embedded Systems for Real Time Media Processing (Estimedia), Jersey City, September 2005

4. D. Etiemble and L. Lacassagne, "Introducing image processing and SIMD computations with FPGA soft-cores and customized instructions", in 1st International Workshop on Reconfigurable Computing Education, Karlsruhe, Germany, March 2006