Multivalued Logic Circuits

I have spent twenty years working on multivalued logic circuits.

from 1974 to 1979: characteristics and models of multivalued circuits. Definition of a general method to design multivalued circuits (Doctorat-es-Sciences).

from 1979 to 1981: examination of possible use of multivalued circuits and design of multivalued integrated circuits. Examination of interconnection issues when going from LSI to VLSI.

from 1981 to 1984: design of different integrated circuits including a 1-KB 4-valued ROM that was fabricated and operational when tested.

From 1983 to 1994: multivalued circuits were only part of the on-going research. During this period, MVL activities include

Design of a 4-valued BiCMOS encoder and decoder circuits for transmission

Design of different 4-valued adders in CMOS and ECL technologies

Algorithms and circuits for 4-valued current-mode multi-operand addition.

From 1974 to 1994, I have presented 23 communications on Multivalued Logic Circuits in the following international conferences: International Symposium on Multiple Valued Logic (18), Fault Tolerant Computing Symposium (1), Compcon Spring(1), Compcon Fall (1), ESSIRC (1), Computer Arithmetic Conference (1) and 7 papers in the following international journals: Computer (1), IEEE Transactions on Computers (2), IEEE J. Solid State Circuits (1), IEICE Transactions on Information and Systems (1), Euromicro Journal (1), Digital Processes (1).